0.0
NA
CVE-2024-30212
Linux USB SCSI Device Memory Disclosure and Modification
Description

If a SCSI READ(10) command is initiated via USB using the largest LBA (0xFFFFFFFF) with it's default block size of 512 and a count of 1, the first 512 byte of the 0x80000000 memory area is returned to the user. If the block count is increased, the full RAM can be exposed. The same method works to write to this memory area. If RAM contains pointers, those can be - depending on the application - overwritten to return data from any other offset including Progam and Boot Flash.

INFO

Published Date :

May 28, 2024, 4:15 p.m.

Last Modified :

Nov. 21, 2024, 9:11 a.m.

Source :

dc3f6da9-85b5-4a73-84a2-2ec90b40fca5

Remotely Exploitable :

No

Impact Score :

Exploitability Score :

Public PoC/Exploit Available at Github

CVE-2024-30212 has a 2 public PoC/Exploit available at Github. Go to the Public Exploits tab to see the list.

Affected Products

The following products are affected by CVE-2024-30212 vulnerability. Even if cvefeed.io is aware of the exact versions of the products that are affected, the information is not represented in the table below.

ID Vendor Product Action
1 Microchip mplab_harmony
: Total Affected Vendor : 1 | Products : 1
References to Advisories, Solutions, and Tools

Here, you will find a curated list of external links that provide in-depth information, practical solutions, and valuable tools related to CVE-2024-30212.

URL Resource
https://github.com/Fehr-GmbH/blackleak
https://github.com/Microchip-MPLAB-Harmony/core/blob/master/release_notes.md
https://github.com/Microchip-MPLAB-Harmony/core/commit/d4608a4f1a140bd899cd4337cdbfb343a4339216
https://github.com/Fehr-GmbH/blackleak
https://github.com/Microchip-MPLAB-Harmony/core/blob/master/release_notes.md
https://github.com/Microchip-MPLAB-Harmony/core/commit/d4608a4f1a140bd899cd4337cdbfb343a4339216

We scan GitHub repositories to detect new proof-of-concept exploits. Following list is a collection of public exploits and proof-of-concepts, which have been published on GitHub (sorted by the most recently updated).

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Fehr-GmbH/blackleak

CVE-2024-30212

Makefile C

Updated: 10 months ago
2 stars 3 fork 3 watcher
Born at : June 11, 2024, 9:13 a.m. This repo has been linked 1 different CVEs too.
Profile Photo
nomi-sec/PoC-in-GitHub

📡 PoC auto collect from GitHub. ⚠️ Be careful Malware.

security cve exploit poc vulnerability

Updated: 5 days, 14 hours ago
6834 stars 1157 fork 1157 watcher
Born at : Dec. 8, 2019, 1:03 p.m. This repo has been linked 849 different CVEs too.

Results are limited to the first 15 repositories due to potential performance issues.

The following list is the news that have been mention CVE-2024-30212 vulnerability anywhere in the article.

The following table lists the changes that have been made to the CVE-2024-30212 vulnerability over time.

Vulnerability history details can be useful for understanding the evolution of a vulnerability, and for identifying the most recent changes that may impact the vulnerability's severity, exploitability, or other characteristics.

  • CVE Modified by af854a3a-2127-422b-91ae-364da2661108

    Nov. 21, 2024

    Action Type Old Value New Value
    Added Reference https://github.com/Fehr-GmbH/blackleak
    Added Reference https://github.com/Microchip-MPLAB-Harmony/core/blob/master/release_notes.md
    Added Reference https://github.com/Microchip-MPLAB-Harmony/core/commit/d4608a4f1a140bd899cd4337cdbfb343a4339216
  • CVE Modified by dc3f6da9-85b5-4a73-84a2-2ec90b40fca5

    Jun. 11, 2024

    Action Type Old Value New Value
    Added Reference Microchip Technology https://github.com/Fehr-GmbH/blackleak [No types assigned]
  • CVE Received by dc3f6da9-85b5-4a73-84a2-2ec90b40fca5

    May. 28, 2024

    Action Type Old Value New Value
    Added Description If a SCSI READ(10) command is initiated via USB using the largest LBA (0xFFFFFFFF) with it's default block size of 512 and a count of 1, the first 512 byte of the 0x80000000 memory area is returned to the user. If the block count is increased, the full RAM can be exposed. The same method works to write to this memory area. If RAM contains pointers, those can be - depending on the application - overwritten to return data from any other offset including Progam and Boot Flash.
    Added Reference Microchip Technology https://github.com/Microchip-MPLAB-Harmony/core/commit/d4608a4f1a140bd899cd4337cdbfb343a4339216 [No types assigned]
    Added Reference Microchip Technology https://github.com/Microchip-MPLAB-Harmony/core/blob/master/release_notes.md [No types assigned]
    Added CWE Microchip Technology CWE-190
    Added CVSS V4.0 Microchip Technology CVSS:4.0/AV:P/AC:L/AT:N/PR:N/UI:N/VC:H/VI:H/VA:H/SC:N/SI:N/SA:N/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X
EPSS is a daily estimate of the probability of exploitation activity being observed over the next 30 days. Following chart shows the EPSS score history of the vulnerability.
CWE - Common Weakness Enumeration

While CVE identifies specific instances of vulnerabilities, CWE categorizes the common flaws or weaknesses that can lead to vulnerabilities. CVE-2024-30212 is associated with the following CWEs:

Common Attack Pattern Enumeration and Classification (CAPEC)

Common Attack Pattern Enumeration and Classification (CAPEC) stores attack patterns, which are descriptions of the common attributes and approaches employed by adversaries to exploit the CVE-2024-30212 weaknesses.

NONE - Vulnerability Scoring System
: